Solapur-University-M.Sc. – Electronics (Semester- III)-2019-On Arm Microcontroller and System Design
| Sr. No | Questions with multiple options |
| 1. | To increase the code density ARM uses _______.
(a) Thumb 16 bit instruction set (b) Jazzale 32 bit instruction set (c) 64 bit instruction set (d) None of these |
| 2. | The LPC 2148 is equipped with USB device controller that enables _____ M bit/s data exchange with USB host controller.
(a) 3 (b) 6 (c) 12 (d) 24 |
| 3. | _________vector is the location of the first instruction executed by the processor when power is applied.
(a) Undefined instruction (b) Reset (c) Software interrupt (d) Prefetch abort |
| 4. | What is the significance of “!” in a load/store instruction?
(a) Don’t update base register in post-indexed load/store (b) Don’t update base register in pre-indexed load/store (c) Update base register in post-indexed load/store (d) Update base register in pre-indexed load/store |
| 5. | The addressing mode where the EA of the operand is the contents of Rn is _______
(a) Pre-indexed mode (b) Pre-indexed with write back mode (c) Post-indexed mode (d) None of the mentioned |
| 6. | _____ functional unit of ARM family architecture is responsible for upgrading the address register contents before the core reads or writes the next register value from memory location.
(a) Data bus (b) Barrel Shifter (c) Incrementer (d) Instruction Decoder |
| 7. | Special type of ROM in microcontroller which can be reprogrammed many times, typically for storing program code, is ______
(a) RAM (b) SRAM (c) Flash memory (d) Cache memory |
| 8. | The additional duplicate register used in ARM machines are called as ____
(a) Copied-registers (b) Banked registers (c) Extra registers (d) Extential registers |
| 9. | The main importance ARM micro-processors is providing operation with ______
(a) Low cost and low power consumption (b) Higher degree of multi-tasking (c) Lower error or glitches (d) Efficient memory management |
| 10. | Abort mode generally enters when _____
(a) An attempt access memory fails (b) Low priority interrupt is raised (c) RAM processor is on rest (d) Undefined instructions are to be handled |
| 11. | In LPC 2148, which among the following is/are the functions of Mask register?
(a) Byte addressability (b) Relocation to ARM local bus for fastest possible I/O timing (c) Treating sets of port bits in the form of group without changing other bits (d) All of the above |
| 12. | In branch instructions of ARM, mnemonic BVC imply _____
(a) Overflow set (b) Carry set (c) Carry clear (d) Overflow clear |
| 13. | Interworking uses _____ and _________ instruction to change the state and jump to a specific routine.
(a) BX, BLX (b) PUSH, POP (c) Both a and b (d) None of these |
| 14. | In LPC 2148, on-chip flash memory is about ______
(a) 32-512KB (b) 8-40 KB (c) 4-20 KB (d) 1-8 KB |
| Data Collected By – K. Jeyanthi | |
| Published on – 16th Nov 2021 | |
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