UPSC Senior Scientific Assistant Electronics Question Paper
If You are appearing in UPSC exam for Senior Scientific Assistant (Electronics) post in Directorate General of Aeronautical Quality Assurance (DGAQA), Department of Defence, Ministry of Defence which will be conducting on 29th Jan 2022 at various exam centers and searching the UPSC Senior Scientific Assistant (Electronics) Previous year papers. Then you are at right place. Here we are providing the UPsC Senior Scientific Assistant (Electronics) Model paper on Basic Electronics
The ripple factor of full wave rectifier is
(a) 1.21
(b) 0.48
(c) 12.1
(d) 4.8
Efficiency of half wave rectifier is
(a) 40.6%
(b) 81.2%
(c) 50.01%
(d) 80.2%
Which of the following amplifier configuration yields the largest power gain of all transistor amplifier configurations ?
(a) Common base
(b) Common emitter
(c) Common collector
(d) Emitter follower
Two main parts of a tank circuit are
(a) R and C
(b) L and C
(c) R and L
(d) R and a Non-transistor
Which of the following configuration is normally used as cascading ?
(a) Common emitter
(b) Common base
(c) Common collector
(d) All of these
Which of the following is the fastest switching devices ?
(a) JFET
(b) BJT
(c) MOSFET
(d) Triode
What is the advantage of FET in comparison to BJT ?
(a) High input impedance
(b) Low noise
(c) High gain bandwidth product
(d) Its current controlled behaviour
The effect of introducing Re in the CE amplifier is to
(a) increase the voltage gain
(b) increase the current gain
(c) decrease the voltage gain
(d) decrease the current gain
A bipolar transistor is a __________controlled device where as a FET is a ________controlled device.
(a) current, voltage
(b) current, current
(c) voltage, current
(d) voltage, voltage
In a CE configuration transistor amplifier, there is
(a) No phase change between input and output voltage
(b) 180 pahse change between input and output current
(c) No phase change between input and output current
(d) None of these
Which class of amplifier has the lowest efficiency?
(a) Class A
(b) Class AB
(c) Class B
(d) Class C
What is the output Z of an EX-OR gate, whose all input are set at A ?
(a) Z=A
(b) Z=1
(c) Z=0
(d) Z=2
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