NIELIT Scientist B Computer Science Paper 2017
What is the average Access Time for a Drum rotating at 4000 revolutions per minute?
(a) 2.5 milliseconds
(b) 5.0 milliseconds
(c) 7.5 milliseconds
(d) 4.0 milliseconds
Comparing the time T1 taken for a single instructin on a pipelined CPU, with time T2 taken on a non-pipelined but identical CPU, we can say that _____?
(a) T1=T2
(b) T1 is greater than T2
(c) T1 is less than T2
(d) Ts is T2 plus time taken for one instruction fetch cycle
How many wires are threaded through the cores in a coincident-current core memory?
(a) 2
(b) 3
(c) 4
(d) 6
Which access method is used for obtaining a record from cassette tape?
(a) Direct
(b) Sequential
(c) Random
(d) Parallel
The process of converting the analog sample into discrete form is called
(a) Modulation
(b) Multiplexing
(c) Quantization
(d) Sampling
Which memory is difficult to interface with processor?
(a) Static memory
(b) Dynamic memory
(c) ROM
(d) None of the option
For a memory system, the cycle time is
(a) Same as the access time
(b) Longer than the access time
(c) Shorter than the access time
(d) Multiple of the access time
In comparison with static RAM memory, the dynamic RAM memory has
(a) Lower bit density and higher power consuption
(b) Higher bit density and lower power consumption
(c) Lower bit density and lower power consumption
(d) None of the option
If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4 x6 array, where each chip is 8K x 4 bits?
(a) 13
(b) 14
(c) 16
(d) 17
A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a Translation Look-aside Buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is
(a) 11 bits
(b) 13 bits
(c) 15 bits
(d) 20 bits
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